Modular imaging apparatus

ABSTRACT

Radiation imaging apparatus includes a support structure for a number of modules which each in their turn support a number of imaging device tiles. An imaging device on each tile provides an array of radiation detector cells. With the modular construction, the apparatus can provide a large imaging array from a large number of individual tiles. The support structure may be located in or form part of an imaging cassette. The modules provide tile mounting locations in one or more rows for the imaging device tiles, whereby the tiles may be accurately mounted with respect the module and to each other prior to being mounted on the support structure. The tiles are mounted on the modules and the modules are mounted within the cassette in a removable manner to facilitate the replacement of faulty tiles when required and/or the replacement of tiles having different resolutions and/or specifications for different imaging applications. Various arrangements for electronically clustering tiles are provided.

[0001] This is a continuation of application Ser. No. 09/197,606 filedNov. 23, 1998.

FIELD OF INVENTION

[0002] The invention relates to imaging apparatus having a modularstructure. In particular the invention relates to imaging apparatuscomprising a plurality of imaging devices.

BACKGROUND TO INVENTION

[0003] The invention finds application to imaging apparatus for largearea imaging using semiconductor imaging devices and is particularlysuitable for high energy radiation imaging (i.e. radiation havingenergies in excess of 1 keV, such as X-rays).

[0004] Traditional arrangements for X-ray imaging, including cassettefilm, other modalities such as wire chambers, scintillating crystals orscreens, (e.g. Sodium Iodide Nal), BGO (Bismuth Gerranium Oxide) and CRplates (Computed Radiography), have been utilized over the past fortyyears.

[0005] More recently, semiconductor imaging devices have been employed,including CCD-based devices, both in stand-alone implementations andcoupled to scintillating screens, silicon microstrip detectors andsemiconductor pixel detectors.

[0006] Semiconductor pixel detectors, such as have been described in theApplicant's International patent application WO95/33332 incorporatedherein by reference, based on ASIC (Application Specific IntegratedCircuit) CMOS processing, can provide high spatial resolution, directdetection, compactness, high absorption efficiency and real-timeimaging. However, limitations on ASIC CMOS technology (e.g. yield) limitthe maximal size of monolithic detectors to a few square centimeters.Various methods of combining individual monolithic detectors have been,therefore, proposed. The major challenge is the formation of a largecontinuous imaging area without any blind regions.

[0007] One method of eliminating such inactive regions in the finalimage has been the use of software interpolation. However, this methoddoes not recover lost information but only provides an approximation.

[0008] Other methods for combining monolithic detectors in large imagingareas without the presence of inactive regions have been proposed.

[0009] In the Applicant's International patent application WO 95/33332mentioned above, a tiling approach is proposed where individualdetectors are staggered on a mosaic in a manner that one third of thetotal desired area is imaged in a single exposure. Three differentexposures, at different positions of the mosaic, are required. Thisapproach is cost efficient as it reduces the total number of requireddetectors and allows for replacement of defective detectors.Nevertheless, this solution requires a moving device, translating theimaging area in two subsequent positions. A total of three snapshots aretaken in order to provide substantially continuous coverage.

[0010] In European patent application EP-A421 869, an approach to thejoining of individual image detectors is described. The detectors areglued to a stepped support with a detector on a step extending beyondthe edge of the step to partially overly a detector on the next lowerstep. Although this approach allows for large area continuous imaging,it provides a rigid device whose thickness increases with imaging area.Furthermore, as individual detectors are rigidly glued on the apparatusdefective component replacement is not addressed.

[0011] Another approach to large area imaging is described in Europeanpatent application EP-A-577 487. This approach provides an imagingapparatus comprising several individual detector substrates arrangedadjacent to each other and rigidly connected to each other by means ofsupport substrates which overlap adjacent detector substrates. Thedetector substrates are rigidly connected to the support substrates bymeans of indium bumps. Although the total thickness of the apparatus isindependent of the imaging area, the overall structure is, once again,rigid and does not allow for simple individual detector replacement.Furthermore, EP-A-577 487 is silent about possible practicaldifficulties in fabricating a large structure comprising an array ofelements rigidly bump-bonded each together.

[0012] The Applicant's UK patent application GB-A-2,305,096 describes anapproach to the mounting of imaging devices, for example of the typedescribed in WO95/33332, on a support plane, in which imaging device issecured to a mount to form an imaging device tile, and then the tile isremovably mounted on a support plane by means of screws, vacuum, orother fastening arrangements permitting non-destructive removablemounting of the imaging device tiles. However, individual mounting ofthe individual tiles is required, which can be a time consuming anddifficult task for large arrays. Also, providing large numbers ofelectrical connections to the individual tiles for a large array canrequire the development of expensive support planes.

[0013] Accordingly, there remain problems to be solved regarding thelarge area imaging, such as facilitating the accurate relativepositioning of large numbers of individual tiles on the support plane.Also, there is a need for structures which provide the basis forsimplifying the arrangement of and connections to electronic componentsexternal to the tiles for enabling readout from the tiles.

[0014] The present invention seeks to facilitate the accurate mountingof individual tiles with respect to one another and to the mastersupport plane.

[0015] Particular and preferred aspects of the invention are set out inthe accompanying independent and dependent claims. Features fromdependent claims may be combined with those of the independent claims inany appropriate manner and not merely in the specific combinationsenumerated in the claims.

SUMMARY OF THE INVENTION

[0016] In accordance with one aspect of the invention, there is providedapparatus for imaging radiation, said apparatus comprising:

[0017] a plurality of tiles, each tile comprising an imaging devicehaving an array of radiation detector cells;

[0018] a number of modules, each module supporting a plurality of saidtiles; and

[0019] a module support structure, said support structure supportingsaid module(s).

[0020] Thus, according to the invention, an imaging module can beprovided for mounting a plurality of imaging devices for forming animaging array, wherein the imaging module is configured to be mountableon a master support structure and configured to support at least oneimaging device tile in a predetermined location. One or a plurality ofmodules can then mounted on a common module support structure, asrequired for a particular application.

[0021] This enables a modular arrangement of a plurality of tiles suchthat the tiles can be readily arranged with respect to one another andwhereby the modules may be assembled with respect to one another toprovide a large area imaging apparatus. The imaging apparatus accordingto the invention also provides a basis for simplifying the connection toand arrangement of circuit components external to the imaging devices aswill be explained below with respect to preferred developments of theinvention.

[0022] In a preferred embodiment, tiles are mounted on a module and thenthe modules are mounted on the support structure, for example forforming an imaging cassette. The modules provide a plurality of tilemounting locations in one or more rows whereby the tiles may beaccurately mounted with respect the modules and to each other prior tobeing mounted on the master support structure.

[0023] Preferably, the tiles are mounted on the modules in a removablemanner to facilitate the replacement of faulty tiles when requiredand/or the replacement of tiles having different resolutions and/orspecifications for different imaging applications. Preferably, themodules are also mounted on the support structure in a removable mannerpermitting easy replacement of a complete module when required and/orthe replacement of modules carrying tiles having different resolutionsand/or specifications for different imaging applications.

[0024] In one embodiment, an imaging device has a two-dimensional arrayof radiation detector cells and a module supports a two-dimensionalarray of tiles.

[0025] In a preferred embodiment, a module comprises a board comprising,on a first surface thereof, an array of tile mounting locations, eachmounting location comprising an arrangement of mounting locationcontacts for contacting corresponding tile contacts on a tile. The boardis elongate and comprises two or more rows of mounting locations forsupporting two or more rows of tiles. The board has, on the firstsurface, a circuit region not populated with the tiles. Preferably, thecircuit region is adjacent one end of the board to maximise the sizeavailable for the imaging array. The circuit region can comprisescontrol circuitry for controlling access to and output of signals fromthe imaging devices. Alternatively, or in addition, circuitry can beprovided on a surface of the board, opposite to the first surface.

[0026] Thus, the module can comprises a board, for example a multilayerprinted circuit board, having a first area with tile mounting locationsand a second area for circuitry external to the tiles, including, forexample, power supply circuitry, module controller circuitry andexternal interface circuitry. Preferably, the board is a multilayerprinted circuit board, conductive tracks connecting the mountinglocation contacts to the circuitry. The provision of the circuitry in apredefined area of the module enhances the modularity of the apparatusand allows the tailoring of the detail design to suit particularapplications and technologies.

[0027] In a preferred arrangement to enhance the performance ofcommunications between the individual tiles and an external computer,tiles within a module are electrically grouped in clusters. Tiles withina cluster are preferably read out in series and one or more clusters arealso readout in series, thus effectively forming larger clusters, termedmegaclusters. In a preferred embodiment the megaclusters are read out inparallel. Advantageously, some of the clusters can be selectivelyde-activated, so that a megacluster can comprise fewer tiles, where itis desired to increase read out speed and smaller areas need to beimaged. In one embodiment, the outputs of the megaclusters of one moduleare multiplexed on the module so as to provide one output per module.Alternatively, or in addition, the outputs from different modules can bemultiplexed in order to further reduce the overall number of signals tobe digitized.

[0028] In one embodiment, an imaging device tile includes an imagingdevice and a mount, an image detecting plane of the imaging device beingtilted with respect to a mounting surface of the mount, the mountingsurface comprising tile electrical contacts interconnectable withcorresponding mounting location contacts at a tile mounting location onthe module. The mounting of the modules on the support structure arearranged such that the modules are tilted to compensate, at leastpartially, for an angle between the image detector planes and a plane ofan imaging cassette in which the apparatus is mounted.

[0029] A preferred form of imaging device comprises one or moredetecting layers sensitive to radiation and one or more readout layers,the detecting layer(s) and the readout layer(s) being joined togetherwith an image detecting plane or planes of the detector layer(s)substantially parallel to the readout layer(s). Preferably, thedetecting layer extends beyond the readout layer on at least two edges,a further edge providing wire connections between the readout layer andthe mount. A wedge can be provided between the imaging device and themount to maintain an angle between the image detecting plane of theimaging device and the mounting surface of the mount.

[0030] A preferred embodiment of the invention comprises modules whichare elongate and the support structure supports a one-dimensional arrayof modules aligned next to each other.

[0031] The imaging devices of adjacent modules can be in mechanicalcontact with each other. Alternatively, adjacent modules are alternatelydisplaced in a first direction and in an opposite directionsubstantially perpendicular to the plane of the module.

[0032] The apparatus can also include an interface board comprisinginterface circuitry, with the modules electrically connected to theinterface board. The interface circuitry comprises circuitry formultiplexing outputs from respective modules.

[0033] The invention also provides an imaging cassette includingapparatus as defined above. The imaging cassette can include an externalconnector for connecting the imaging cassette to an external processor.The support structure can be integral to a housing of the cassette orcan be contained within the housing of the cassette. Where the cassetteis to replace a conventional film cassette for X-ray imaging, thecassette comprises a housing having an X-ray transmissive surface.

[0034] An embodiment of the invention can enable, for example, theprovision of an imaging cassette having a total imaging area of, say,approximately 100×200 mm and a thickness of 2.5 cm or less. The cassettecan be portable and lightweight. Also defective tile replacement can befacilitated. Given a pixel size of 35 micrometers, an imaging cassetteof 100×200 mm could comprise about 16 million pixels. Pixel digitisationwith 10 or 12 bits resolution can be provided by 16 bits of computermemory per pixel. Fast data transfer from cassette to computer can beachieved, for example with a data transfer time of less than 5 seconds.

[0035] The invention further provides an imaging system includingapparatus as described above and control electronics and/or an imageprocessor for processing signals output from the cassette. The cassetteoutput can be digitized after multiplexing of the signals, for examplein an external computer. Alternatively, it can be part of the interfacecircuitry, for example on the interface board or on the module(s).Analog and/or video digitization can be used.

[0036] In accordance with another aspect of the invention, there isprovided a module for use in apparatus as described above, the moduleenabling the mounting an array of tiles, each tile comprising an imagingdevice having an array of radiation detector cells and having aplurality of tile contacts on a mounting surface thereof The modulecomprises:

[0037] a board having, on a first surface thereof, an array of tilemounting locations, each mounting location comprising an arrangement ofmounting location contacts for contacting corresponding tile contacts ona tile and means permitting removable mounting the tile at the tilemounting location;

[0038] circuitry for controlling access to and output of signals fromrespective tiles when mounted at the tile mounting locations; and

[0039] electrical connections from the mounting location contacts to thecircuitry; and

[0040] means for mounting the module on a support structure for aplurality of such modules.

[0041] In accordance with a further aspect of the invention there isprovided a method of forming an imaging array for imaging radiationcomprising:

[0042] mounting a plurality of tiles on an imaging module, each tilecomprising an imaging device having an array of radiation detectorcells; and

[0043] mounting a plurality of the modules on an imaging support, eachmodule supporting an array of the tiles.

[0044] In accordance with yet a further aspect of the invention, thereis a provided a method of manufacturing an imaging device tile, themethod comprising:

[0045] supporting an imaging device on a tile mount at a predefinedangle within a mould;

[0046] filing a volume between imaging device and the tile mount withfiller material; and

[0047] removing the imaging device tile from the mould.

BRIEF DESCRIPTION OF TIE DRAWINGS

[0048]FIG. 1 is a schematic representation of an imaging system;

[0049]FIG. 2 is a schematic partial cross-section of an imaging device;

[0050]FIG. 3 is a schematic representation of an image cell circuit;

[0051]FIG. 4 is a schematic representation of a proposal for an imagingtile;

[0052]FIG. 5 comprises schematic side, plan and functional diagrams ofan example of an imaging module according to an embodiment of theinvention;

[0053]FIG. 6 is a schematic side view illustrating the relativeplacement of two imaging device tiles;

[0054]FIG. 7 is a schematic plan view of an imaging cassette;

[0055]FIGS. 8a and 8 b are schematic cross-sectional side views of twoembodiments of a cassette;

[0056]FIG. 9 is another cross-sectional side view of a cassette; and

[0057]FIG. 10 is a schematic external view of a cassette.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0058] Exemplary embodiments of the invention are described hereinafter,by way of example only, with reference to the accompanying drawings.

[0059]FIG. 1 is a schematic representation of an example of an imagingsystem 10 as described in the Applicant's International application WO95/33332 for radiation imaging of an object 12 subjected to radiation14. The radiation may, for example, be X-ray radiation and the object 12may, for example, be a part of a human body. The imaging devicecomprises an imaging array 15 including at least one Active-pixelSemiconductor Imaging Devices (ASID) 16. Although only one ASID 16 isshown schematically in FIG. 1, the imaging array will typically includea plurality of imaging devices 16. Each imaging device provides aplurality of image, or pixel cells 18. Each imaging device directlydetects high energy incident radiation such as X-rays, γ-rays, β-rays orα-rays and accumulates at each pixel cell, by means of a randomlyaccessible, active, dynamic image cell circuit on or adjacent to acorresponding image detector cell, values representative of theradiation incident at that image cell.

[0060] The imaging device 16 can be configured as a single semiconductorsubstrate (e.g., silicon) with each image, or pixel cell comprising animage detector cell 19 and an active image cell circuit 20, oralternatively on two substrates, one with an array of image detectorcells 19 and one with an array of active image cell circuits 20, thesubstrates being mechanically connected to each other by, for example,microbumps (bump-bonds).

[0061]FIG. 2 is a schematic partial cross-sectional representation of atwo-substrate imaging device showing the connection of the substrates.Individual detector cells 19 of an image detector substrate 44 areconnected to corresponding cell circuits 20 of a readout substrate 42 bymeans of microbumps 46. The cell circuits 20 are schematicallyrepresented within the substrate 42 by means of the symbol of a FET.

[0062] The detector substrate 44 is provided with a continuous electrode50 on the side of the substrate 44 which is exposed to incidentradiation. In FIG. 2, therefore, the incident radiation is assumed toarrive in an upwards direction. On the rear surface of the detectorsubstrate 44, a plurality of detector cell electrodes 54 are provided.It is the array of detector cell electrodes 54 which effectively definesthe individual image detector cells 19 within the detector substrate 44.A bias voltage is applied to the continuous electrode 50 and image celldetection zones 52 are defined between the continuous electrode 50 andthe respective detector cell electrodes 54. Each of the detector cellelectrodes is electrically and mechanically coupled to a respective cellcircuit 20 by a respective microbump 46. It will be appreciated that therepresentation in FIG. 2 is highly schematic, and not to scale.

[0063] When a photon is photo-absorbed at a detector cell 19 creating anelectric charge or when a charged radiation ionizes the detection zone52 of the detector substrate 44 at a detector cell 19, an electric pulseflows from the detector substrate detection zone 52 to the cell circuit20 for that image cell 18.

[0064] A value associated with the electric pulse is then accumulated inan active circuit element, either directly as a charge value or as anequivalent voltage or current value such that new charge created fromsubsequent incoming radiation is added continuously. Examples ofpossible accumulating devices are an integrated capacitor or the gate ofan integrated transistor. The charge accumulation process in a cellcircuit 20 continues until control signals are issued from controlelectronics 24 to start a process of reading out information byaddressing each cell circuit 20, effectively in a random access manner.During readout of the accumulated charge values, charge continues to beaccumulated. Cell circuits 20 may selectively be reset after readout todischarge the charge accumulation circuit elements, and only then areimage cells inactive for a very short time with practically no deadtime.

[0065] Thus, the cell circuits 20 are provided for each image cell 18 toaccumulate charge created in the detector cell when, for example, aphoton or a charged particle of radiation is incident on the detectionzone of that detector cell 19. An active cell circuit 20 and thedetector cell 19 can be of the order of a few tens of microns in size(e.g., 10-50 μm).

[0066] A schematic representation of an example of a cell circuit isdescribed with reference to FIGS. 3. This example of a cell circuit usesfield effect transistors (FETs) arranged as a cascode connectedamplifier. FET M11A 70, and in particular the gate thereof, forms chargeaccumulation circuitry. FET M11B 72 forms readout circuitry. FET M11C 77forms reset circuitry. VBIAS 60 is a bias voltage input across thedepletion zone forming a detector cell 19 of the image cell. Thedetector cell 19 is represented by a diode symbol DI 1. In the cellcircuit itself, SIGOUT 62 is an analog signal output and VANA 64 ananalog power supply input. RES-R-1 66 is a reset input and ENA-R-1 68 isan enable input for the cell circuit.

[0067] Charge generated in the detector cell 19 in response to incidentradiation is automatically accumulated in the gate of a transistor M11A70 when both the RES-R-1 66 and ENA-R-1 68 inputs are low. To read theimage cell, ENA-R-1 68 is taken to a high state, which allows current toflow from the transistor M11A 70 through the transistor M11B 72 toSIGOUT 62. The cell circuit is reset by taking RES-R-1 66 to high,whereupon after RES-R-1 66 has been at high for merely a fewmicroseconds, any. accumulated charge will have been removed from thegate of the transistor M11A 70. Immediately after RES-R-1 66 goes to alow level, charge can begin to accumulate at the gate of the transistorM11A 70. If no reset pulse is supplied to the reset input RES-R-1 66,then it is to be noted that a reading operation when the enable inputENA-R-1 68 goes high does not destroy the charge but instead merelycauses a current flow directly proportional to the accumulated charge.This allows multiple readings without resetting.

[0068] In the example shown in FIG. 3, charge accumulation ability canbe maximised by arranging that the gate capacitance of a chargeaccumulation transistor M11A 70 forms substantially (say greater than90% of) the input node capacitance (total capacitance) of the detectorcell 19, the charge accumulation circuitry 70, the readout circuitryM11A 72 and reset circuitry 77 of FIG. 3 and minimizing the parasitic orunwanted capacitance of all other circuit (and detector) components. Fora 35 μm by 35 μm cell circuit, for example, the M11A 70 capacitance canbe 2 μF and the FET gate voltage dynamic range can be at least Volts.This corresponds to about 25,000,000 electrons in storage capacity.

[0069] Returning to FIG. 1, the control electronics 24 includesprocessing and control circuitry, which is connected to the cellcircuits 18 on the semiconductor substrate as represented schematicallyby the two-way arrow 22. The control electronics 24 enable the cellcircuits 20 associated with individual image cells 18 to be addressed(e.g., scanned) for reading out charge accumulated in the cell circuits20 at the individual image cells 18. The charge read out is supplied toAnalog to Digital Converters (ADCs) for digitisation and Data ReductionProcessors (DRPs) for processing the binary signal.

[0070] The control electronics 24 is further interfaced via a pathrepresented schematically by the arrow 26 to an image processor 28. Theimage processor 28 includes data storage in which it stores the digitalvalue representative of the charge read from each image cell along withthe position of the image cell 18 concerned. For each image cell 18,each charge value read from the image cell is added to the charge valuealready stored for that image cell so that a charge value isaccumulated. As a result, each image can be stored as a representationof a two-dimensional array of pixel values which can be stored, forexample, in a database.

[0071] The image processor 28 can access the stored image data in thedatabase to select a given image (all the array) or a part of the image(a sub-sample of the image array). The image processor 28 reads thevalues stored for the selected image positions and causes arepresentation of the data to be displayed on a display 32 via a pathrepresented schematically by the arrow 30. The data can of course beprinted rather than, or in addition to being displayed and can besubjected to further processing operations. For example, background andnoise can be subtracted as a constant from each pixel charge value. Thispedestal and/or background subtraction is possible if prior to imagetaking an “empty” image is acquired. For each pixel a background valueis deduced and can be subtracted accordingly.

[0072] User input devices 36 connected via paths representedschematically by the arrow and possibly interacting with the display 32as represented schematically by the double arrow 38 can be used tocontrol the operation of the imaging system. The user input devices 36can include, for example a keyboard, a mouse, etc.

[0073] In the Applicant's co-pending UK Patent application GB 9614620.4,an approach is described for providing continuous coverage while, at thesame time, preserving the option to replace individual detectorsnondestructively. Specifically, this approach applies to hybrid imagingdevices comprising a semiconductor substrate 44, bump-bonded to an ASICCMOS crystalline silicon readout chip 42 as described in the Applicant'sInternational patent application WO 95/33332.

[0074]FIG. 4 of the accompanying drawings corresponds to FIG. 3B of GB9614620.4. Here the imaging device 16 comprising the bump-bondeddetector-readout structure 44/42 described above with reference to FIGS.1-3 is mounted on a Printed Circuit Board (PCB) mount 81 to form animaging device called a tile 90. The detector-readout structure 44/42 istilted with respect to the PCB 81 by means of a wedge 80 or anequivalent structure. In this manner, an active region 94 of a tile (say90.1) covers an inactive region of a subsequent tile (i.e. the adjacenttile 90.2). A region 92 of each tile is reserved for wire connections 83between the PCB 81 and the readout substrate 42. Electrical contactbetween the master support 82 and the PCB 81 is achieved by meansthrough the connection of conductive bumps, or balls, 84 and conductiverings or pads 85. The rings are located at desired positions by means ofholes in an insulating layer 86. Below the rings 85 are conductivecontacts. The tile 90 is mounted on the master support 82 by means of ascrew 88 which projects from the tile mount PCB 81 and a nut 87.Alternatively, other removable fastening means such as zero insertionforce connectors, clips, vacuum, etc., can be used removable to securethe tiles on the support.

[0075] Image continuity along the direction perpendicular to the planeof FIG. 4 requires a detector active up to the two edges along thisdirection. The Applicant's co-pending UK patent application GB 9703323.7proposes a solution to this whereby the detector substrate extends overthe readout substrate 42 on all three sides except the side, or region,92.

[0076]FIG. 5 comprises schematic side (a), plan (b) and functional (c)diagrams of an example of an imaging module of an embodiment of theinvention. An embodiment of the invention seeks to provide a modulesuitable for an imaging cassette for an imaging application whichcomprises an array of imaging tiles, for example as described above withreference to FIGS. 14 while reducing the problems of mounting thosetiles in the cassette.

[0077] Accordingly, an embodiment of the invention provides a modularconstruction whereby a cassette may contain one or more modules, eachmodule supporting a plurality of imaging tiles. In a preferredembodiment of the invention, a module resembles a ladder in that one ormore rows of tiles are provided on the module. Indeed, the module isalso known as a ladder.

[0078] Thus, in a preferred embodiment of the invention, an imagingcassette, which can be configured as a replacement for a conventionalX-ray film cassette, comprises a collection of one or more modules, eachmodule comprising a collection of one or more imaging tiles mountedthereon. In a preferred embodiment, the tiles are mounted on the modulein a non-destructive removable manner by means of removable fastenings,for example screws and nuts, and the modules are mounted in the cassettein a non-destructive removable manner, for example, by screws and nuts.This facilitates the replacement of tiles and modules in use, forexample where a tile or module is faulty, and/or to move the tiles ormodules between different cassettes and/or change the imagingcharacteristics of tiles and/or modules within a cassette.

[0079]FIGS. 5a and 5 b depict an example implementation of thispreferred embodiment. The example of a ladder module 100 comprises 24imaging tiles 90 mounted on a multilayer printed circuit board 102. Thetiles 90 are arranged in a two dimensional mosaic of two rows and twelvecolumns on the upper surface, as seen in FIG. 5a, of the module board102. A region 104 of the module 100 is reserved on the module board 102for electronic components 106 such as analog electronics, multiplexers,preamplifiers, analog to digital converters, etc., as required for aparticular application. Arrangements, for example apertures or openings110 at the extreme ends 108 of the module board 102, are provided forreceiving screws or other fastenings (not shown in FIG. 5) for mountingthe module 100 on a cassette support (not shown in FIG. 5). Separateelectrical connections arrangements such as cable connectors 109, edgeconnectors, ribbon cables, etc, can be provided. Alternatively, themodule board 102 could be provided with combined mechanical andelectrical connector arrangements, for example zero insertion forceconnector(s), other pin and/or socket connector arrangements etc., whichserve to removably locate the board mechanically and provide electricalconnections. An insulating material 112 layer separates the tiles 90from module board 102. The insulating layer 112 is preferably no morethan 1 mm thick. Holes 85 (see FIG. 6) are provided, for example byengraving, in the insulating layer 112 for locating conductive rubberpads or rings 86 (see FIG. 6) or other electrically conductive elements,preferably resilient conductive elements, by means of which bump-shapedcontacts 84 (see FIG. 6) on the tile 90 can be electrically (power) andelectronically (signals) connected to contacts and conductive paths onand in the module board 102. Where conductive rubber pads 86 are used,the rubber thickness is preferably less than under 0.5 mm.

[0080] Analog electronic components 113, such as switches, capacitors,coils etc, are preferably placed on the lower surface, as shown in FIG.5a, of the module board. These components serve, for example, inreducing or eliminating noise associated with the DC voltage of the tileelectronic components.

[0081] The choice of two rows of tiles 90 on a module 100 in the presentembodiment is preferred as it provides at least one free edge for eachtile 90, thus facilitating tile replacement and, at the same time,providing enough space at the region 104 for mounting the electroniccomponents 106. It should, however, be noted that a number of rows oftiles other than two could be used in other embodiments.

[0082] In this embodiment, the tiles 90 are arranged electrically andelectronically grouped in clusters 114 such that individual tiles withineach cluster are read out in series only. The individual clusters 114can be grouped together to form so-called megaclusters 116 so that alltiles in a megacluster are effectively readout serially. Separatemegaclusters are then readout in parallel. The conductive paths from thetile location contacts to the electronic circuitry are formed byconductive tracks on layers in the multilayer circuit board 102.Connections between layers are provided by plated through holes inaccordance with conventional multilayer circuit board technology.Sensitive signals are allocated a separate layer within the circuitboard and can be shielded by shielding layers.

[0083] In the example implementation of FIG. 5c, each cluster 114comprises three tiles and there are a total of eight such clusters.Specifically, tiles 171, 172, 173 are cascaded in cluster 201, tiles174, 175, 176 are cascaded in cluster 202, tiles 177, 178, 179 arecascaded in cluster 203, tiles 180, 181, 182 are cascaded in cluster204, tiles 183, 184, 185 are cascaded in cluster 205, tiles 186, 187,188 are cascaded in cluster 206, tiles 189, 190, 191 are cascaded incluster 207 and tiles 192, 193, 194 are cascaded in cluster 208.

[0084] Clusters 201 to 208 are then paired to form four megaclusters 116of six tiles each, the six tiles within a megacluster being read inseries and the four megaclusters in parallel. Specifically, clusters201, 202 form one megacluster 210, clusters 203, 204 form anothermegacluster 212, clusters 205, 206 form another megacluster 214 andclusters 207, 208 form another megacluster 216.

[0085] In another example implementation, the clusters 201, 204, 205 and208 are deactivated and only clusters 202, 203, 206 and 207 are active.The imaging area can thus be reduced to increase readout speed byeffectively reading only three tiles in series. The choice between largeor small imaging areas, is implemented electronically by means ofswitches in the electronic circuitry 106 and does not require anydismounting of the imaging tiles 90.

[0086] In a specific implementation of the module 100 of FIG. 5, thetiles 90 provide an imaging area of, approximately, 18.13×9.85 mm. Thepixel pitch, excluding some edge pixels is 35 micrometers. There are 256rows and 512 columns of pixels, hence a total of 131,072 pixels pertile. The detector substrate extends beyond the edges of the readoutsubstrate chip except for side near region 92 of tile (see FIGS. 4 and6). Hence, the detector layers can be brought into physical andmechanical contact along the upper and lower edges of the module 100 asseen in FIG. 5b. In other words, the edges 120 of the detectorsubstrates of adjacent tiles on a module 100 and adjacent tiles of acassette, when modules are arranged side by side (see FIG. 7) in acassette, can be in physical (mechanical) contact (see FIG. 8a).

[0087] The extent by which the detector substrate 44 extends beyond thereadout substrate on edges except edge 92 is determined by the precisionwith which the detector edges are themselves defined. Thus, the detectorsubstrate edges are preferably defined to a high precision, for example200 micrometer precision. In this case, the detector substrate extendsbeyond the readout substrate by at least this amount. More preferably,the precision should be 100 micrometers and the detector substrateextends beyond the readout substrate edges by at least this amount. Evenmore preferably. the precision should be 50 micrometers and the detectorsubstrate extends beyond the semiconductor substrate edges by at leastthis amount. Even more preferably, the precision should be 10micrometers and the detector substrate extends beyond the semiconductorsubstrate edges by at least this amount. Detector polishing can beemployed to this end. It should be understood here that the referencesto the semiconductor substrate edges relate to at least the two edgesadjacent to the region 92 and possibly to the edge at the opposite endof the imaging device 16 to the region 92.

[0088] In another embodiment, a thin insulating film, for example amylar film, is placed between adjacent detector surfaces in directcontact (i.e. at 120 in FIG. 5b). Preferably, this film has a thicknessof 10 micrometers or less. More preferably, the film thickness is 5micrometers or less. Yet more preferably, the film thickness is 1micrometer or less.

[0089] In an alternative embodiment, the modules 100 can be positionedin an alternating up and down configuration (see FIG. 8b) with onemodule being offset relative to each of the or each immediately adjacentmodule along the direction perpendicular to the module plane by anamount slightly larger than the detector thickness. In this manner, thedetector substrates 44 do not need to be in physical contact with oneanother, but rather they lie slightly under or over each other. Theoverlap of the detector substrates 44 needs to be no more than a fewmicrometers, typically less than 300 micrometers overlap. As thedetector substrate thickness can typically be about 1 mm, the additionalthickness required for the cassette is insignificant.

[0090] Internal tile alignment is explained with reference to FIG. 6.The detector substrate 44 and readout substrate 42 are bonded togethervia microbumps as described with reference to FIG. 2. The resultingimaging device 16 is then accurately mounted on the tile mount PCB 81with a screw 88 arranged in a hole in the tile PCB and the end of thescrew projecting downwards. The mounting is achieved by means of a jigand/or mould. Preferably, a two piece aluminum mould, machined withmechanical accuracy of 50 micrometers is used. The mould is closed andthe volume 80 between imaging device 16 and the tile mount 81 is thenfilled with epoxy resin. Regions of the mould are covered with siliconrubber to protect detector-CMOS top surface and PCB bottom surface fromepoxy leaks. The angle subtended by the planes of imaging device 16 andtile mount 81, in other words the angle of insertion of wedge 80, shouldbe as small as possible in order to minimise parallax error.Nevertheless, if this angle is made too small, the readout substrate inthe region 94 will be too close to the region 92 of a subsequent tileprovoking electrical instability. In the present example implementation,the angle of insertion is 5 degrees. The use of a jig and mould enablesthis angle to be determined with a high precision. Preferably thisprecision should be better than 1 degree. More preferably, thisprecision should be better than 0.5 degrees. Even more preferably, thisprecision should be better than 0.1 degrees. However, differences in theangles between tiles can be corrected for in the software calibration ofthe imaging devices.

[0091] The alignment between the imaging devices 16 and the tile mount81 along the direction perpendicular to the paper of FIGS. 5a and 6 isensured by the use of the jig and mould. It is required that the tilemount be completely covered by the detector in the directionperpendicular to the plane of FIGS. 5a and 6. In other words, thedetector edges 120 extend beyond underlying tile mount edges. In thisdirection, i.e. the direction perpendicular to the edges 120 of FIG. 5b,the tile mount PCB is narrower than the detector substrate 44 byapproximately 150 microns. Accordingly, precise location of the detectoredges with respect to the edge pixels is important.

[0092]FIG. 6 also shows the mounting of the tile PCB 81 on the modulesupport 102 by means of screws 88 and nuts 87 and electrical andelectronic connections by means of bump-shaped contacts 84 on the tilePCB and conductive circular pads 86, located in holes in the insulatinglayer 112, on the module support 102.

[0093] As mentioned above, in the preferred embodiment of the invention,the module substrate 102 is a multilayer PCB capable of routing signalsand power to the tiles. For example, the number of layers can be six ormore. PCB layout design provides for placement of noise filteringcapacitors at various points of the module PCB. Ground planes are alsoprovided to protect noise sensitive signals. Preferably, each noisesensitive signal should have its own layer.

[0094] In the preferred embodiment of the invention, modules are mountedon a support structure to form a large rigid assembly, or cassette 330,forming a large active imaging area 16 as represented in FIG. 7.Examples of cassette structures are shown in Figures a, 8 b, 9 and 10.

[0095] Preferably, the modules are placed in parallel and in mechanicalcontact. An example implementation of this embodiment of the inventionis depicted in FIGS. 7 and 8 a. In this example, six modules 301, 302,303, 304, 305, 306 are placed in parallel and in mechanical contactalong their long edges, to form a large imaging surface 15 ofapproximate area 217.6×115.6 mm.

[0096] In an alternative embodiment, the modules 100 can be positionedin an alternating up and down configuration, as represented in FIG. 8b,with one module being offset relative to the or each immediatelyadjacent module along the direction perpendicular to the module plane byan amount slightly larger than the detector thickness. In this manner,the detector substrates 44 do not need to be in physical contact withone another, but rather they lie slightly under or over each other.

[0097]FIG. 9 is a further cross-sectional view of a cassette. This showsone module board 102 mounted on the module support structure 320 withina cassette 330 by means of screws 107 passing through the apertures 108in the module board. Screws can be provided at one or both ends of themodule board. Where screws are provided at one end of the board, aninter-engaging structure on the module support 320 for the other end ofthe board can be provided. The module support can be pre-threaded toreceive the screws, or can be secured by means of a separate nut. Spacesor other mechanisms can be provided for adjusting the relative positionof the module and the module support in order, for example, to tilt themodule to correct parallax error as described below. For example,adjustable mechanical supports can be provided to adjust the mechanicalposition and to correct detector angle from 5 to 2.5 degrees and toadjust all of the modules in a cassette at the same time at one end, orat both ends of the module array. Preferably, the apertures 108 in themodules are elongate as shown in FIG. 7 to facilitate adjustment of themodules and also to facilitate installation and removal of the modules.Thus, for example, to install a module in the middle of the modulearray, the fixing screws for the surrounding modules can be loosened andmoved away from the position of the new module which can hen be mounted,and the screws tightened. Subsequently, the surrounding modules an bemoved back towards the newly installed module and the screws tightened.Similarly, to remove a centrally located module, the screws for mountingthe surrounding modules can be loosened and moved away from the moduleto be removed.

[0098] It will be appreciated, that although the present embodiment isdescribed as using screws for providing mechanical mounting of themodules, alternative mechanical arrangements such as clips, bayonetfittings and so on could be used. As a further alternative, combinedelectrical and mechanical arrangements such as zero insertion forceconnectors, plugs and sockets, could be used.

[0099] In the preferred embodiment of the invention, separate electricalconnections are achieved by means of ribbon cables 111 which connect tocable connectors 109 provided on the module board 102. The ribbon cableconnectors allow the electrical connection of the module 100 to aninterface board 309.

[0100] In the preferred embodiment of the invention, an interface board309, comprising power supplies, module system control electronics and acomputer interface (optionally also with digital to analog converters)is placed near to one of the edges of the multi-module assembly 330. Inthis manner, an increase in the thickness of the cassette is avoided.The interface board forms part of or is contained with the imagingcassette.

[0101] External connections from the cassette to, for example, anexternal computer, are provided by means of a conventional externalconnector (for example a parallel connector) 354, which can be connectedvia a cable 356 to a computer. As the external connection via the cable356 to a computer can be relatively long, the interface board 309 caninclude conventional amplification circuitry for transmission from thesignals from the interface board to the computer and for reception ofsignals therefrom.

[0102]FIG. 10 is a schematic external view of an imaging cassette 330,the cassette comprising an external housing 350, with an x-raytransmissive upper surface 352. FIG. also shows the external connector354. It will be noted that the external connector is provided on one endof the cassette which, in use, will be visible in the insertion slot 372of X-ray apparatus 370. Thus, as shown in FIG. 10, the imaging cassette330 is intended to replace a conventional X-ray film cassette for use inconventional X-ray equipment. Typically, the cassette will have athickness of 20-30 mm and an external surface of, for example, 180×240mm (eg, for mammography) or 400×400 mm (eg, for chest x-rays).

[0103] Parallax error due to the tilting of the detecting surface withrespect to the module and cassette planes can be reduced, by tilting themodules within the cassette plane so as to compensate for the anglebetween plane of the detector substrate 44 and that of the tile mountPCB 81. This tilting in the example shown in FIG. 7 is equivalent to anelevation of the left end of the module of FIG. 5a. By way of exampleonly, for a total module length of 300 millimeters, a module tilting of2.5 degrees would raise module left side by 13 millimeters, well withinan overall constraint of 25 mm total cassette thickness. An X-ray angleof incidence of 2.5 degrees amounts to a parallax error of 33micrometers for detector thickness of 750 micrometers. The total readouttime for a cassette depends on the pixel readout/switching rate and thenumber of tiles on the cassette. In the preferred embodiment of theinvention, the output for a megacluster derived by multiplexing clusteroutputs in circuitry 106 in the region of the module identified at 104in FIG. 5b. The overall output rate is increased by a factor equal tothe number of megaclusters. In the example implementation described withreference to FIG. 5c, there are four megaclusters. Accordingly, for apixel readout/switching rate of 5 MHz, the module output rate is 20 MHz.With 144 tiles in the full cassette of FIG. 7, the total number ofpixels approaches 18.9 million. Accordingly, for pixel switching ratesof 2.5, 5.0, 10.0 MHz, the total approximate readout times are 7.5seconds, 3.8 seconds and 1.9 seconds, respectively. If only half of thetiles are selected for readout, the readout time is halved for the someclock rate. Preferably, the pixel switching rate should be 2.5 MHz orhigher. More preferably, the pixel switching rate should be 5 MHz orhigher. Even more preferably, the pixel switching rate should be 10 MHzor higher.

[0104] In the preferred embodiment of the invention, the analogmultiplexed outputs from each module are further multiplexed in thecassette. In the example implementation of FIG. 6, the analog outputsfrom each of the six modules are fed into four analog multiplexers onthe interface board 309 and the resulting four signals, representingcombinations of module output signals, are digitized. The digitisationcan be effected by feeding the outputs from the interface board on amultichannel ADC in the control electronics of a computer (for examplecontrol electronics as in FIG. 1). Alternatively, video digitisation canbe employed.

[0105] Thus, in an embodiment of the invention the cassette 330 couldform the imaging array 15 of a system as shown in FIG. 1.

[0106] Thus there has been described imaging apparatus comprising amodular structure including a first support structure, a plurality ofsecond support structures, and a plurality of imaging devices such thatthe second support structures are mechanically mounted on the firstsupport structure and a plurality of the imaging devices is mounted oneach second support structure.

[0107] The imaging device can comprise one or more detecting layerssensitive to radiation and one or more readout layers, the detectinglayer(s) and the readout layer(s) being joined together with an imagedetecting plane or planes of the detector layer(s) substantiallyparallel to the readout layer(s).

[0108] Although exemplary embodiments of the invention have beendescribed, it will be appreciated that the invention in not limitedthereto, and that many modifications, substitutions and additions to theembodiments described could be envisaged within the scope of theinvention.

[0109] Accordingly, although an embodiment of the present invention hasbeen described based on the imaging device technology described in theApplicant's earlier patent applications and patents, the invention isalso applicable to imaging devices based on other technologies. Forexample, the invention is applicable to imaging devices with imagedetection and readout implemented in a single unitary substrate.

[0110] Also, although the ladders, or modules, as described as having asupport in the form of a PCB on which the imaging device tiles andfurther circuit components are mounted, the modules could compriseseparate support structures for imaging device tiles and furthercircuitry, the separate support structures being interconnected bysuitable mechanical and electrical connection structures. Also, themechanical and electrical interconnection of the ladder modules and thecassette can be achieved in any suitable manner.

[0111] Also, although particular dimensions for and numbers ofindividual elements are given for the embodiments described, it will beappreciated that these are merely given by way of example and can beadapted to any particular application and/or technology used in aparticular application of the invention. Also, although particularconfigurations are shown, these may be changed in other embodiments. Forexample, rather than providing analog outputs from the modules andinterface board, analog to digital converters could be provided on theinterface board or the modules to provide digitized outputs from theinterface board or the modules, respectively. Also, with suitableintegration of functions, the discrete components on the interface boardand modules may be replaced by a few number of components using largescale integrated circuits (e.g. Application Specific Integrated Circuits(ASICs)). Indeed, it can be envisaged that the interface board could bedispensed with if the functions performed thereby were incorporated inlarge scale integrated circuits (e.g. ASICs) on the modules.

What is claimed is:
 1. Apparatus for imaging radiation, said apparatuscomprising: a plurality of tiles, each tile comprising an imaging devicehaving an array of radiation detector cells; and a plurality of modules,each module supporting a plurality of said tiles.
 2. Apparatus accordingto claim 1, further comprising a module support structure, said supportstructure supporting said module(s).
 3. Apparatus according to claim 1,wherein a said tile is removably mountable to a said module. 4.Apparatus according to claim 1, wherein a said imaging device has atwo-dimensional array of radiation detector cells.
 5. Apparatusaccording to claim 1, wherein a said module supports a two-dimensionalarray of tiles.
 6. Apparatus according to claim 1, wherein each saidmodule comprises a board comprising, on a first surface thereof, anarray of tile mounting locations, each mounting location comprising anarrangement of mounting location contacts for contacting correspondingtile contacts on a said tile.
 7. Apparatus according to claim 6, whereineach board is a multilayer printed circuit board.
 8. Apparatus accordingto claim 6, wherein said board is elongate and comprises two or morerows of mounting locations for supporting two or more rows of tiles. 9.Apparatus according to claim 6, wherein said board has, on said firstsurface, a circuit region not populated with said tiles.
 10. Apparatusaccording to claim 9, wherein said board, adjacent one end thereof, has,on said first surface, a circuit region not populated with said tiles.11. Apparatus according to claim 9, wherein said circuit regioncomprises control circuitry for controlling access to and output ofsignals from said imaging devices.
 12. Apparatus according to claim 11,further comprising circuitry on a surface of said board, opposite tosaid first surface.
 13. Apparatus according to claim 11, whereinconductive tracks connect said mounting location contacts to saidcircuitry.
 14. Apparatus according to claim 13, wherein said circuitryand said conductive tracks are arranged electronically to group tilesinto first clusters, imaging devices on said tiles of a said firstcluster being read out in a serial manner.
 15. Apparatus according toclaim 14, wherein said first electronic clusters are electronicallygrouped in second electronic clusters, a said second electronic clustercomprising one or more first electronic clusters read out in a serialmanner.
 16. Apparatus according to claim 15, configured to read outplural said second clusters read out in parallel.
 17. Apparatusaccording to claim 15, comprising electronic switch circuitry fordetermining which of said first clusters are combined for a said secondcluster.
 18. Apparatus according to claim 17, wherein said switches aremounted on a surface of said board opposite to said first surface. 19.Apparatus according to claim 17, wherein said switches are arranged toprovide selective deactivation of said first clusters.
 20. Apparatusaccording to claim 1, wherein a said imaging device tile comprises: asaid imaging device and a mount, an image detecting plane of saidimaging device being tilted with respect to a mounting surface of saidmount, said mounting surface comprising tile electrical contactsinterconnectable with corresponding mounting location contacts at a tilemounting location on said module.
 21. Apparatus according to claim 20,wherein said modules are tilted at least partially to compensate fortilting of said image detector planes.
 22. Apparatus according to claim20, wherein said imaging device comprises one or more detecting layerssensitive to radiation and one or more readout layers, said detectinglayer(s) and said readout layer(s) being joined together with an imagedetecting plane or planes of said detector layer(s) substantiallyparallel to said readout layer(s).
 23. Apparatus according to claim 22,wherein said detecting layer extends beyond said readout layer on atleast two edges, a further edge providing wire connections between saidreadout layer and said mount.
 24. Apparatus according to claim 20,comprising a wedge between said imaging device and said mount tomaintain an angle between said image detecting plane of said imagingdevice and said mounting surface of said mount.
 25. Apparatus accordingto claim 2, wherein said modules are elongate and said support structuresupports a one-dimensional array of said modules aligned next to eachother.
 26. Apparatus according to claim 25, wherein said imaging devicesof adjacent modules are in mechanical contact with each other. 27.Apparatus according to claim 25, wherein each said module comprises aplanar board and adjacent modules are alternately displaced in a firstdirection and in an opposite direction, said first and oppositedirections being substantially perpendicular to the plane of each saidboard.
 28. Apparatus according to claim 1, further comprising aninterface board comprising interface circuitry, said modules beingelectrically connected to said interface board.
 29. An apparatusaccording to claim 28, wherein said interface circuitry comprisescircuitry for multiplexing outputs from respective modules. 30.Apparatus according to claim 2 comprising an imaging cassette. 31.Apparatus according to claim 30, wherein said imaging cassette comprisesan external connector for connecting said imaging cassette to anexternal processor.
 32. Apparatus according to claim 30, wherein saidcassette comprises a housing, said support structure being integral tosaid housing.
 33. Apparatus according to claim 30, wherein said cassettecomprises a housing, said support structure contained within saidhousing.
 34. Apparatus according to claim 30, wherein said cassettecomprises housing having an X-ray transmissive surface.
 35. An imagingsystem comprising apparatus according to claim 30 and controlelectronics and/or an image processor for processing signals output fromsaid cassette.
 36. A module for use in apparatus according to claim 1,for mounting an array of tiles, each tile comprising an imaging devicehaving an array of radiation detector cells and having a plurality oftile contacts on a mounting surface thereof, wherein said modulecomprises: a board having, on a first surface thereof, an array of tilemounting locations, each mounting location comprising an arrangement ofmounting location contacts for contacting corresponding tile contacts ona tile and means permitting removable mounting of said tile at said tilemounting location; circuitry for controlling access to and output ofsignals from respective tiles when mounted at said tile mountinglocations; electrical connections from said mounting location contactsto said circuitry; and means for mounting said module on a supportstructure for a plurality of such modules.
 37. A module according toclaim 36, wherein said board is a multilayer printed circuit board,conductive tracks connecting said mounting location contacts to saidcircuitry.
 38. A module according to claim 36, wherein said board,adjacent one end thereof, has, on said first surface, a circuit regioncomprising said circuitry for controlling access to and output ofsignals from respective tiles when mounted on said board.
 39. A moduleaccording to claim 36, comprising circuitry on a surface of said boardopposite to said first surface.
 40. A module according to claim 36,wherein said circuitry comprises an analog to digital converter stage.41. A method of forming an imaging array for imaging radiationcomprising: forming a plurality of tiles, each tile comprising animaging device having an array of radiation detector cells; and forminga plurality of said modules, each module supporting a plurality of saidtiles.